The status surface
The Status page is the authoritative answer to what exists, what qualifies, and what has been validated — on which hardware, against which commit, with which evidence. Every row is a record in capabilities.json. Every cell is a state from the closed vocabulary. Every cell has a source path and an evidence class.
A row marked Planned is a maturity claim, not a validation claim. Validation is reserved for Validated records. Capability transitions are visible in the history.
The v1 status page is small. Every row below is source-reviewable. No row claims measurement the evidence does not support.
Targets
| Target | State | Source | Evidence |
|---|---|---|---|
| Apple Silicon (M-series), in-memory CPU | Implemented | prism-ecs-runtime/, prism-image/ | one sanitized cimage, no executed receipt |
| Linux x86_64, in-memory CPU | Implemented | prism-ecs-runtime/, prism-image/ | source reviewable, no published receipt |
| ANE (Apple Neural Engine) | Planned | ADR-031; roadmap | no code path |
| ROCm (MI300X-class) | Planned | ADR-031 | no code path |
| XDNA / XDNA2 (AMD NPU) | Planned | roadmap | no code path |
| Other accelerators | Planned | roadmap | no code path |
Backends
| Backend | State | Source | Evidence |
|---|---|---|---|
| In-memory CPU | Implemented | prism-ecs-runtime/ | source reviewable |
| Disk-backed mmap | Implemented | prism-ecs-compile::cimage | source reviewable |
| Provider-delegated kernels | Planned | ADR-031, roadmap | no published receipt |
Models
| Model identity | State | Source | Evidence |
|---|---|---|---|
| (no models admitted in v1) | Planned | — | the corpus has no real model identity |
The v1 site does not admit a real model identity. A sanitized cimage in the corpus identifies its test fixture as the source; the source digest is test-digest, a placeholder. A real model identity is a milestone in the roadmap.
Routes
| Route | State | Source | Evidence |
|---|---|---|---|
| (no routes admitted in v1) | Planned | — | the corpus has no real route |
A route is admitted by an execution receipt on a target. The v1 corpus has no execution receipt. A real route is a milestone in the roadmap.
Honest limits
The list above is the list. A row is not on the list because the implementation does not exist for it. A row is on the list as Implemented because a reviewer can find the entry point in the source. A row is on the list as Planned because the architecture or contract exists and the end-to-end path does not.
No row is Qualifying in v1. A qualifying record requires a test or fixture path and a named limit. The qualification harness has not yet emitted a publishable record. A follow-on ADR (ADR-034) creates the type; the engine's test suite produces records that the SSG can project.
No row is Validated in v1. A validation record requires a commit, a target, a build, an evidence class, and a receipt. The receipt types exist; the emission pipeline does not. A follow-on sequence of ADRs (034–038 of the schema-binding series) closes the gap.
The transition history for every capability is preserved in capability-history.json. The v1 history is short: each row above has one genesis record. As the engine emits receipts, the history grows.
The status page does not claim that Prism "works on Apple Silicon." It says that the source path exists, that a sanitized cimage is published, and that no real execution receipt has been emitted. The visitor who needs the latter knows where to look: the receipts are not in the corpus; the gaps are named.
Targets
| Name | State | Source | Evidence / Limit |
|---|---|---|---|
| Apple Silicon (M-series), in-memory CPU execution path. | implementedunreleased | crates/prism-ecs-runtime/, crates/prism-image/ | No executed receipt has been emitted to publishable storage. The cimage encoder/decoder and runtime paths are reviewable; end-to-end execution is not yet captured as evidence. |
| Linux x86_64, in-memory CPU execution path. | implementedunreleased | crates/prism-ecs-runtime/, crates/prism-image/ | Source reviewable; no published execution receipt. The cimage format is portable; the runtime path is the same. |
| Apple Neural Engine (ANE) execution target. | plannedunreleased | docs/adr-031-aiter-atom-rocm-provider.md | No end-to-end code path exists. The architecture contract is described in ADR-031 and the roadmap. |
| AMD ROCm (MI300X-class) execution target. | plannedunreleased | docs/adr-031-aiter-atom-rocm-provider.md | No end-to-end code path exists. The provider boundary is described in ADR-031. |
| AMD XDNA / XDNA2 NPU execution target. | plannedunreleased | docs/roadmap.md | No end-to-end code path exists. The target class is named; the provider is not yet designed. |
| Other accelerator targets (TPU, custom silicon, etc.). | plannedunreleased | docs/roadmap.md | No end-to-end code path exists for any specific accelerator in this bucket. |
Backends
| Name | State | Source | Evidence / Limit |
|---|---|---|---|
| In-memory CPU execution backend. | implementedunreleased | crates/prism-ecs-runtime/ | Source reviewable; no published execution receipt. The dispatch path exists; the receipt emission pipeline does not yet publish to stable storage. |
| Disk-backed mmap execution backend (cimage payloads, 16 KB-aligned). | implementedunreleased | crates/prism-ecs-compile/src/cimage/ | Source reviewable. The mmap path exists; end-to-end execution against this backend is not captured as evidence. |
| Provider-delegated kernel execution (ANE/ROCm/XDNA/etc.). | plannedunreleased | docs/adr-031-aiter-atom-rocm-provider.md, docs/roadmap.md | No provider-delegated backend is implemented in the v1 source. The provider boundary is described in ADR-031. |
Honest limits
The list above is the list. A row is not on the list because the implementation does not exist for it. A row is on the list as Implemented because a reviewer can find the entry point in the source. A row is on the list as Planned because the architecture or contract exists and the end-to-end path does not.
No row is Qualifying in v1. A qualifying record requires a test or fixture path and a named limit. The qualification harness has not yet emitted a publishable record. A follow-on ADR (ADR-034) creates the type; the engine's test suite produces records that the SSG can project.
No row is Validated in v1. A validation record requires a commit, a target, a build, an evidence class, and a receipt. The receipt types exist; the emission pipeline does not. A follow-on sequence of ADRs (034–038 of the schema-binding series) closes the gap.
The transition history for every capability is preserved in capability-history.json. The v1 history is short: each row above has one genesis record. As the engine emits receipts, the history grows.
The status page does not claim that Prism "works on Apple Silicon." It says that the source path exists, that a sanitized cimage is published, and that no real execution receipt has been emitted. The visitor who needs the latter knows where to look: the receipts are not in the corpus; the gaps are named.